单元串联拓扑结构已经成为当前高压变频领域主要的研究方向之一。因此，本课题研究开发了一种应用于此拓扑结构的基于FPGA的多路SPWM控制器。本文对SPWM调制原理进行了分析,在此基础上对多路SPWM控制器的硬件和软件进行了设计，并最终通过了实验验证。 首先，本文介绍了实验系统的结构、调制方法及故障诊断。实验系统以单元串联拓扑结构高压变频系统为实验平台。论文中通过对几种调制方法的分析，对比他们优缺点，最终决定采用载波水平移相SPWM调制，并从理论上分析了SPWM脉冲宽度的计算方法。同时给出了系统故障的分类。 其次，设计了以FPGA为核心的控制器的硬件电路：分为脉冲扩展板的硬件电路设计和外围硬件电路设计。其中脉冲扩展板的硬件电路设计包括FPGA和CPLD的硬件设计等；外围硬件电路设计包括光纤接口板中针对CPLD的设计、故障判定电路设计和光纤传输等。通过以上电路的设计，从硬件上保证了控制器能够完成脉冲分配及故障诊断的功能。 接着，设计了系统软件。在硬件设计的基础上，采用VHDL语言对FPGA及CPLD进行编程，实现了控制器以下功能：接收中心控制板算出的SPWM脉冲宽度数据，产生SPWM脉冲；将产生的SPWM脉冲通过光纤分配给各功率单元；从各功率单元采集故障信号；对故障信号编码并发送至中心控制板。 最后，本控制器在6kV/22kW实验平台上完成了调试，通过对实验波形的分析得出，本控制器能够应用于单元串联变频调速系统中，可以产生多路SPWM脉冲，故障诊断安全可靠，系统运行稳定，达到了设计要求。

The series cell topology structure has been becoming a main research tendency in the current high voltage frequency variable field. And so we research and developed a multi-route SPWM controller for the high voltage frequency -variable motor driving system that based on the series cell topology structure. the controller from the SPWM modulating theory is analyzed, at one time, the hardware and software are designed in article. Finally, the controller past the test. Firstly, it is introduced that includes the test platform's system composition, modulating method and fault check method. The test system platform is a platform of series cell high voltage frequency variable system topology structure. By analyzing several modulating method and comparing their advantages and shortcomings, the controller adopts the carrier level phase-shift modulating method at last, and analyzed the SPWM pulse width computing method theoretically. Also introduced the system's existing faults kinds. Secondly, the controller's hardware circuit takes the FPGA as its control kernel is designed, which separately is hardware circuit with pulse expand board and interface. The former part includes design of FPGA and CPLD chip circuit etc; latter part includes CPLD design of fiber interface, fault determinant circuit design and fiber transmission. Thirdly, the system's software is designed. On the basis of hardware design, the controller adopts the VHDL language to program the FPGA and CPLD, and realized the following functions:it can be programmed to receive the SPWM pulse width data from the center DSP board, and produce the SPWM pulse. distribute the produced SPWM pulses to every power cell by optical fiber.sample and collect fault signals from every power cell.encode the fault signal and send it to center control board. Finally, tested the controller on the 6kv/22kw testing platform, by analyzing the testing waves get the results that using this controller in series cell frequency variable speed adjusting system can produce the corrected multi-routes SPWM pulses, and it can check the fault reliably, and the system runs stably, and meet the design requirement.