CUDA作为一个被广泛应用的并行计算平台，支持CPU和GPU之间的协同工作，有效地结合了CPU在逻辑控制方面的优势和GPU在并行计算方面的特长。本文以CUDA并行计算平台为基础，着重探讨CPU与GPU相结合的雷达信号处理算法。

首先，本文介绍了CPU+GPU的并行计算架构。研究雷达信号处理关键算法在CPU和GPU协作运算下的可并行性，并给出了CUDA并行编程关键算法的综合优化策略，包括合理分配线程、对齐与合并全局内存访问、避免共享内存Bank冲突等。

其次，本文概述了脉冲多普勒雷达信号处理的关键技术，对线性调频信号、脉冲压缩、MTI处理、MTD处理、CFAR检测等核心算法展开了研究，并通过仿真实验验证了算法的有效性。其中，针对脉冲压缩并行化运算效率低的问题，本文提出了一种利用GPU实现优化杂波随机序列归一化与杂波幅度调制序列相乘的方法。通过使用随机函数生成随机地址偏移来保证序列的随机性，并对脉冲的数据进行归一化处理。通过在GPU上使用并行归约算法求解序列中的最大值，显著提高了运算效率。

然后，针对CFAR模块在复杂场景下可能出现的背景水平预测不准确和计算复杂度高等问题，本文提出了一种基于贝叶斯干扰控制的鲁棒加权似然恒虚警检测器（BRWL-CFAR）算法。该算法通过将杂波距离等分并优化选择决策，动态评估威布尔背景下的杂波水平，通过杂波电平反馈控制，提高了检测器的抗干扰能力，提高了CFAR模块的检测性能，并利用并行化加速CFAR模块提高了运算效率。

最后，本文设计并完成了雷达信号处理算法的并行化仿真实验。通过分析CPU+GPU并行算法的仿真结果和实测数据验证了该系统能够正确处理雷达回波数据，且在实验平台下，GPU的加速比达到约105倍，显示出良好的加速效果。同时，本文完成了整个阵列雷达信号处理系统的软件调试，满足系统需求，具有一定的工程应用价值。

CUDA,  as a widely used parallel computing platform, supports the collaborative work between CPU and GPU, effectively combining the advantages of CPU in logic control and the speciality of GPU in parallel computing. Based on the CUDA parallel computing platform, this paper focuses on the radar signal processing algorithm combining CPU and GPU.

Firstly, this paper introduces the parallel computing architecture of CPU+GPU. It investigates the parallelizability of key algorithms for radar signal processing under the collaborative computing of CPU and GPU, and gives a comprehensive optimization strategy for key algorithms of CUDA parallel programming, including reasonable allocation of threads, aligning and merging global memory accesses, and avoiding shared memory Bank conflicts.

Secondly, this paper outlines the key technologies of pulse Doppler radar signal processing, and researches the core algorithms of linear FM signal, pulse compression, MTI processing, MTD processing and CFAR detection, and verifies the effectiveness of the algorithms through simulation experiments. Among them, for the problem of low efficiency of pulse compression parallelisation operation, this paper proposes a method of using GPU to achieve optimised clutter random sequence normalisation and clutter amplitude modulation sequence multiplication. The randomness of the sequence is ensured by generating random address offsets using a random function and normalising the data of the pulse. The computational efficiency is significantly improved by solving for the maximum value in the sequence using a parallel normalisation algorithm on the GPU.

Then, for the problems of inaccurate background level prediction and high computational complexity that may occur in CFAR module in complex scenes, this paper proposes a robust weighted likelihood constant false alarm detector (BRWL-CFAR) algorithm based on Bayesian interference control. The algorithm dynamically evaluates the clutter level in the Weibull background by equidistributing the clutter distance and optimizing the selection decision, improves the anti-jamming ability of the detector through the feedback control of the clutter level, improves the detection performance of the CFAR module, and improves the computational efficiency by using parallelisation to accelerate the CFAR module.

Finally, this paper designs and completes the parallelisation simulation experiment of radar signal processing algorithm. By analysing the simulation results of the CPU+GPU parallel algorithm and the measured data, it is verified that the system can correctly process the radar echo data, and under the experimental platform, the acceleration ratio of GPU reaches about 105 times, which shows a good acceleration effect. At the same time, this paper completes the software debugging of the whole array radar signal processing system, which meets the system requirements and has certain engineering application value.

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