论文中文题名: | 基于FPGA的雷达中频测试信号源的设计与实现 |
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学号: | 200907339 |
保密级别: | 公开 |
学科代码: | 081002 |
学科名称: | 信号与信息处理 |
学生类型: | 硕士 |
学位年度: | 2012 |
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专业: | |
第一导师姓名: | |
论文外文题名: | Design and Realize of Radar Intermediate Frequency Test Signal Source Based on FPGA |
论文中文关键词: | 直接数字频率合成 ; 现场可编程门阵列 ; Verilog HDL ; 杂散抑制 |
论文外文关键词: | |
论文中文摘要: |
信号源是现代雷达系统的重要组成部分,在雷达系统测试中,需要一种能产生不同测试信号的信号源。而以直接数字频率合成技术(DDS)为核心,以现场可编程门阵列(FPGA)为硬件基础实现便携式、低成本的雷达测试信号源是雷达中频测试信号源的发展方向。
本论文首先分析了DDS原理以及DDS系统的构成,研究了DDS系统在理想情况下和非理想情况下的输出频谱,得出DDS频谱杂散的主要特点,分析比较了增大波形的有效存储容量、采用抖动技术和CORDCI算法等三种杂散抑制方法。以DDS技术为核心,设计了一种雷达中频测试信号源的系统方案和各模块硬件电路,包括FPGA模块、D/A模块、滤波器模块和放大衰减模块,其中FPGA模块包括电源电路、时钟电路和下载电路三部分。最后,以CycloneⅡ系列FPGA芯片EP2C8Q208C8N为平台完成了NIOSⅡ软核处理器系统、波形生成和波形调制的FPGA逻辑功能的设计和实现。其中波形生成部分是FPGA逻辑设计的关键,主要包括相位累加器和正弦查询表,波形调制部分包括线性调频、非线性调频和相位编码等。
通过测试该雷达中频测试信号源最高输出频率达到35MHz,频率分辨率小于0.1Hz,频谱信杂比≥50dB,达到设计性能指标要求。
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论文外文摘要: |
Signal source is an important part of modern radar system, during the radar test system, a signal source which could produce different test signal is needed. And radar test signal source which use direct digital frequency synthesize(DDS) as core, use field programmable gate array(FPGA) as hardware base to be portable and low cost is the direction of radar intermediate frequency test signal source. At first, the construction of DDS principle and DDS system was analyzed, the DDS system’s output spectrum in ideal condition and non-ideal condition was researched, finds DDS spectrum disorder’s main characteristic, analysis and compare the effective storage capability which could increase waveform, joins jitter technology and CORDCI algorithm of spurious suppression method. Secondly, using DDS technology as core, a radar intermediate frequency test signal source system and hardware circuit of every module was designed, including FPGA module, D/A module, filter module and amplification attenuation module. The FPGA module included power circuit, clock circuit and download circuit. In the end, using CycloneⅡseries FPGA chip EP2C8Q208C8N as platform, the design and realization of NIOS Ⅱ soft-core processor system, wave generation and wave modulation FPGA logical function was finished. The wave generation is the key of FPGA logic design, mainly includes the design and realization of phase accumulator and sine lookup. The wave modulation includes the design and realization of linear FM, nonlinear FM and phase encoding. According to the test, the highest output frequency of the radar intermediate frequency signal source reaches 35MHz, frequency resolution is less than 0.1 Hz, frequency spectrum Signal-to-clutter ratio≥50Db,reach the design performance index requirement.
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中图分类号: | TN957.51 |
开放日期: | 2012-06-17 |