近年来，随着智能手机、相机等设备的普及以及人工智能时代的到来，人们对图像质量提出了越来越高的要求。图像信号处理器是整个成像系统的核心，决定了最终图像质量。自动白平衡是整个图像信号处理器中的一个重要组成部分，用于修正受光源色温影响而出现的图像整体色偏问题，使图像更好的还原物体本身的颜色，进而提高图像质量。

本文通过对多种自动白平衡算法的研究，从保证自动白平衡效果及适于硬件实现的角度出发，提出了一种基于色温曲线的改进的自动白平衡算法。该算法结合灰度世界算法及色温曲线白平衡算法，分析不同色系点B/G、R/G在不同色温情况下的分布，根据分布情况对图像中的灰色系点进行筛选，并将筛选后得到的点的信息作为白平衡处理的相关数据。白平衡处理过程中，为解决环境瞬时突变可能出现的图像过处理问题，增加了画面防抖动功能。同时采用自适应可变步长渐进调节策略，解决了显示画面受实时环境影响出现的闪烁问题，提高了用户实际体验。该算法规避了单色场景失效的情况，提高了自动白平衡算法实现效果，同时在保证计算精度的前提下降低了算法复杂度，降低了该算法硬件实现复杂度及硬件资源开销。

在算法验证效果满足设计要求后，结合SOC整体架构设计，使用Verilog HDL进行子模块设计。在子模块设计时，采用流水线设计，提高了处理速度。同时，针对待处理数据量过大情况，提出了一种运算压缩策略，可在对精度影响较小前提下，有效的大幅减少数据处理量、降低功耗、降低资源开销、提高处理速度。对部分模块，进行了分时复用设计，降低了资源开销、降低了功耗。子模块设计完成后，进行系统集成，并完成逻辑综合。综合结果显示模块能够满足设计需求，相比较于优化前，面积减小了29.2%，功耗降低了32.6%。最终进行FPGA原型验证，验证结果显示该模块自动白平衡效果良好。

In recent years, with the popularity of smart phones, cameras and other devices as well as the coming of artificial intelligence era, people have put forward higher and higher requirements for image quality. Image signal processor is the core of the whole imaging system and determines the final image quality. Automatic white balance is an important part of the whole image signal processor, which is used to correct the whole image color deviation caused by the color temperature of the light source, so that the image can restore the color of the object itself better and improve the image quality.

Based on the study of various automatic white balance algorithms, an improved automatic white balance algorithm based on color temperature curve is proposed from the point of view of ensuring the effect of automatic white balance and suitable for hardware implementation. This algorithm combines the gray world algorithm and the white balance algorithm of color temperature curve, analyzes the distribution of different color system points B/G and R/G under different color temperature conditions, filters the gray system points in the image according to the distribution conditions, and takes the information of the filtered points as the relevant data of white balance processing. In the process of white balance processing, the image anti-jitter function is added to solve the problem of image over-processing which may occur due to instantaneous mutation in the environment. By adopting the adaptive variable step size progressive adjustment strategy, the flicker problem of the display screen affected by the real-time environment is solved, and the actual user experience is improved. The algorithm avoids the failure of monochrome scenes, improves the implementation effect of automatic white balance algorithm, and reduces the complexity of algorithm, hardware implementation complexity and hardware resource overhead while ensuring the calculation accuracy.

After the algorithm verification effect meets the design requirements, combined with the overall SOC architecture design, Verilog HDL is used for sub-module design. In the submodule design, the pipeline design is adopted to improve the processing speed. At the same time, in view of the large amount of data to be processed, an algorithm compression strategy is proposed, which can effectively reduce the data processing capacity, reduce power consumption, reduce resource overhead and improve processing speed on the premise of having little impact on accuracy. For some modules, time-sharing reuse is designed to reduce resource overhead and power consumption. After the submodule design is completed, the system integration and logic synthesis are completed. The comprehensive results show that the module can meet the design requirements. Compared with before optimization, the area is reduced by 29.2% and the power consumption by 32.6%. Finally, FPGA prototype verification shows that the module has a good effect of automatic white balance.